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Leakage power is a major issue of concern in Deep Sub-Micron (DSM) and Ultra Deep Sub-micron technology (UDSM) in CMOS circuit design. LECTOR-EP (LECTOR technique with extra PMOS), LECTOR-EN (LECTOR technique with extra NMOS) and Double LECTOR techniques have been proposed in this paper to reduce the leakage. Due to increase in resistance for the path from Vdd to ground, substantial reduction in leakage...
In this paper we propose a novel JL transistor with triple metal gate structure (JLTM). The DC, analog and RF performance parameters of the proposed JLTM have been compared with one standard JL transistor with single metal structure (JLDM). The DIBL and SS of JLTM reported are 0.0059 and 61.838 mV/dec respectively. Analog performance parameters gm, gm/Id, gm/gd has also been reported to be improved...
Conventional MOSFETs has reached to their scaling limits due to the physical limitations, so alternative transistor structures and use of suitable materials is the subject of current research. In this paper, the analog and RF performance of Double Metal Double Gate (DMDG) MOSFETs are investigated for its suitability to be used for analog and RF applications. The different analog parameters like output...
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