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In this paper, we investigate the benefits of instructionset extensions (ISEs) on a 16-bit microcontroller architecturefor software implementations of cryptographic hash functions,using the example of the five SHA-3 final round candidates. Weidentify the general algorithm bottlenecks, taking into accountmemory footprints and cycle counts of our optimized referenceassembly implementations. We show...
This paper presents a real-time processing platform for high-definition stereo video. The system is capable to process stereo video streams at resolutions up to 1, 920 × 1, 080 at 30 frames per second (1080p30). In the hybrid FPGA-GPU-CPU system, a high-density FPGA is used not only to perform the low-level image processing tasks such as color interpolation and cross-image color correction, but also...
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