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In this paper multiple input multiple output (MIMO) channels are considered that are subject to tolerances. The deviations in amplitude and phase that occur at the transmitter and at the receiver are investigated. The resulting MIMO systems with different calibrations are evaluated in terms of the corresponding MIMO channel capacities and their suitability for beamforming-based evaluations as they...
In Switzerland small and medium-sized enterprises represent more than 99% of all businesses. Therefore, prediction of their micro- and macroeconomic business development is of importance. In this paper, we propose a novel approach for predicting business volume using company characteristics and characteristics of the county the company operates in. We investigate which data sources can be combined...
Municipalities seek a Service Oriented Architecture (SOA) that allows the integration and interoperability of e-governmental services with their own IT systems. Municipalities benefit from computational insights such as the quantification of the unicipalities' business landscape. This enables them to calculate the number of businesses they need to attract in a sector and in which ones they are positioned...
In recent years, the semiconductor industry has been witnessing an increasing reuse of hardware IPs for System-on-Chip (SoC) designs and embedded computing systems on FPGA platforms with hard-core processors. The IP-reuse comes with an increasing complexity at the hardwaresoftware (HW-SW) interface. The efforts required to access the HW through the increasingly complex HW-SW interface diminishes the...
In the face of heterogeneity, privacy laws and the scale of various data sources, Privacy Preserving Record Linkage is an increasingly relevant topic for organizations that intent to collaborate on a data level. In addition, new collaboration scenarios require an exchange that would take place online and in real-time. To address these needs, in this paper we present a framework for consensual and...
Divide and conquer is already a proven strategy to handle the complexity of state-of-the-art SoCs. For any minor or major revision of an SoC, difficult decisions about its architecture have to be made at very early stages of the design cycle. System prototyping on FPGAs is an essential step in the SoC design flow for the verification of the hardware architecture. In this paper, we present a graph-grammar-based...
The proliferation of Unmanned Aerial Vehicles (UAVs) raises a host of new security concerns. Our research resulted in a prototype UAV monitoring system, which captures flight data and performs real-time behavioral monitoring. If a behavioral anomaly is found, the system will alert the operator. In addition, a novel visualization system tracks the real time behavior and flight of multiple UAVs. Our...
In this paper, a novel electromagnetic bandgap (EBG) structure has been introduced. Initially, the EBG is theoretically analysed using a lumped element model. Thereafter the dispersion diagram of the EBG is extracted by simulating the EBG unit cell in eigenmode Solver of CST Microwave Studio. The simulated bandgap values shown by the dispersion diagram are then experimentally validated by using a...
Next to performance, it becomes increasingly important that Networks-on-Chip (NoCs) also provide security features such as access control, authentication and availability. They are usually implemented by firewalls at the network interfaces (NIs) of the processing elements (PEs). This paper provides a more efficient way to integrate these security requirements into application-specific NoCs by inserting...
Increased hardware IP reuse is required to meet the productivity demands for the future complex Systems-on-Chip (SoC). Nowadays, IP integration is enabled using standardized meta-data formats such as IP-XACT. We present a new concept called grammar-based IP integration and packaging (GRIP), which additionally encodes design integration knowledge into a set of graph re-writing rules using standard...
Past years have seen intense research on reliability techniques for error detection recovery at various levels ranging from circuit level up to architectural level or even software level. In such scenarios, affordable techniques for error correction usually imply a timing penalty, e.g., check-pointing usually requires to repeat some part of the computation, which imposes a higher computation time...
The proliferation of Unmanned Aerial Vehicles (UAVs) raises a host of new security concerns. Our research resulted in a prototype UAV monitoring system, which captures flight data and performs real-time estimation/tracking of airframe and controller parameters utilizing the Recursive Least Squares Method. Subjected to statistical validation and trend analysis, parameter estimates are instrumental...
The challenge of accurately modeling dispatching rules and policies is a difficult and costly exercise. Currently, the only accurate way to qualify the impact and effectiveness of policy changes is by analyzing the policy in either a test facility or in production. In a test facility it is difficult to recreate the production environment. Additionally, to test policy changes in production is risky...
To date, there still lacks a way to accurately simulate data memory accesses in source-level simulation (SLS) of host-compiled embedded SW. The difficulty lies in that the accessed addresses for the load and store instructions can not be statically determined. Without knowing those addresses, the source code can not be annotated appropriately for data cache simulation. In this paper, we show an approach...
Source-level simulation (SLS) of embedded software annotates the source code based on the matching of the control flow graphs (CFG) between the source code and the crosscompiled binary code. However, existing SLS approaches still can not guarantee to find a matching for a CFG that is optimized by the compiler. Further, they rely on debug information, which may be unreliable. In this paper, the authors...
Transaction level modeling (TLM) improves the simulation performance by raising the abstraction level. In the TLM 2.0 standard based on OSCI SystemC, a single transaction can transfer a large data block. Due to such high abstraction, a great amount of information becomes invisible and thus timing accuracy can be degraded heavily. We present a methodology to accurately time such block transactions...
Virtual prototypes are widely employed in today's development of embedded hardware and software. To model and simulate the VPs, SystemC has been adopted as a standard language tool. With SystemC, hardware modules and software codes can be modeled as processes. To model concurrency, one process can be suspended and then the SystemC scheduler selects the next process to resume. This is also known as...
Presents a collection of slides covering the following topics: surveillance radar; standardization; multilateration; and automatic dependent surveillance broadcast.
Presents a collection of slides covering the following topics: airspace surveillance, aircraft navigation, ICNS architectures and aircraft communication systems.
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