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A novel amorphous oxide TFT Enhancement/Depletion (E/D) inverter through uni-/bi-layer channel hybrid integration with conventional process is demonstrated. The device's threshold voltages (Vth) is strictly controlled and the fabrication technique is specially designed. Comparing to the reported high speed bootstrapped inverter, the output swing, switching voltage gain and noise margin of E/D inverter...
We have demonstrated self-aligned top-gate amorphous oxide TFTs for large size and high resolution displays. The processes such as source/drain and channel engineering have been developed to realize the self-aligned top gate structure. Ar plasma is exposed on the source/drain region of active layer to minimize the source/drain series resistances. To prevent the conductive channel, N2O plasma is also...
This paper describes the design and fabrication of the high performance ring oscillator with the standard 0.5 mum bottom-gate amorphous Ga2O3-In2O3-ZnO TFT technology. A series of process and geometry parameters of devices are sophistically optimized to decrease the circuit signal's propagation delay and, in particular, a novel 3 TFTs bootstrapped inverter structure using the load-transistor's overlap...
Currently, both high-density 3-D stacking nonvolatile (NV) memory and embedded NV memory in advanced systems on panel (SOPs) urgently demand the assistance of new and functional transition metal-oxide materials. This is to overcome serious fabrication issues encountered in the use of conventional Si or poly-crystalline Si materials, as well as to increase storage density with lower process cost. This...
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