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This paper presents the efficient architecture of a bitmap-index-based query processor for fast data analytics on 65-nm SOTB CMOS process. The post-simulation with a supply voltage of 0.55 V indicates that the processor could operate at 125 MHz and process up to 232 million records/second in case 32 keys and queries are utilized. Furthermore, by applying the reverse body bias voltage of −2 V, the...
In this paper, a hybird adaptive Coordinate Rotation Digital Computer (HA-CORDIC) has implemented in 65nm Silicon On Thin Buried oxide (SOTB) CMOS technology. In the HA-CORDIC implementation, the adaptive algorithm is utilized for reducing the iteration of CORDIC algorithm. In comparison with other floating-point CORDIC designs, the latency of our proposed scheme is lower. It spends only 12, 20, and...
In this paper, a design of 16-bit fixed-point digital signal processor (DSP) is proposed. This DSP is based on the Harvard architecture, having two buses for ALU and a pipeline multiply accumulator (MAC). It composes of 16 general purpose 24-bit registers together with 41 four-cycle instruction sets. The DSP has a simple structure which is compact and flexible. The DSP is designed for low-power consumption,...
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