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A neuron-MOS-based dynamic circuit scheme with two-phase clocks for realizing voltage-mode quaternary logic, is proposed. The dynamic quaternary inverter and literal circuits are designed, and the standard CMOS process with a 2-ploy layer is adopted without any modification of the thresholds. In the proposed circuits, the problem of floating output nodes is solved. The proposed circuits have some...
Dynamic circuits using n-channel multiple-input floating-gate MOS(FGMOS) transistors to realize binary and ternary logic are presented. In binary domino circuits, the n-channel FGMOS transistors are used to replace the nMOS logic block to simplify the circuit structure. By using the advantage that voltage signals are easy to be added by means of floating gate in multiple-input FGMOS transistor, a...
A novel Schmitt trigger with controllable hysteresis using neuron-MOS transistors is presented. By selecting the ratio of capacitive coupling coefficients, a Schmitt trigger with different hysteresis characteristics can be achieved. By only varying the external input control signals, the hysteresis window can be conveniently moved without changing its width. The proposed Schmitt trigger has considerable...
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