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A neuron-MOS-based dynamic circuit scheme with two-phase clocks for realizing voltage-mode quaternary logic, is proposed. The dynamic quaternary inverter and literal circuits are designed, and the standard CMOS process with a 2-ploy layer is adopted without any modification of the thresholds. In the proposed circuits, the problem of floating output nodes is solved. The proposed circuits have some...
Dynamic circuits using n-channel multiple-input floating-gate MOS(FGMOS) transistors to realize binary and ternary logic are presented. In binary domino circuits, the n-channel FGMOS transistors are used to replace the nMOS logic block to simplify the circuit structure. By using the advantage that voltage signals are easy to be added by means of floating gate in multiple-input FGMOS transistor, a...
A No Race (NORA) dynamic logic using neuron-MOS transistor is presented. The circuit is designed using the n-channel neuron-MOS transistor instead of the nMOS logic block or pMOS logic block in the conventional NORA dynamic logic circuit. The proposed full-adder shows that the logic block of NORA circuit can be simplified by utilizing neuron-MOS transistor. A simple synthesis technique of the n-channel...
A new enhanced dynamic logic using multiple-input floating-gate MOS(FGMOS) transistors is presented. The circuit technique is designed using an n-channel multiple-input FGMOS pull down logic tree instead of the nMOS logic tree in the conventional enhanced differential cascode voltage switch logic (EDCVSL) circuit. The logic tree of EDCVSL is dramatically simplified by utilizing multiple-input FGMOS...
A novel CMOS quaternary D-type edge-triggered flip-flop using a single latch with neuron-MOS literal circuits is presented. In the proposed circuit, data are sampled into the latch during a short transparency period for rising edge of the clock signal by using the arrow pulse produced by the race-hazard of the clock signal. The quaternary literal functions are realized by using neuron-MOS transistors...
A new ternary D flip-flop using one latch is presented. In order to meet the non-transparent demand in flip-flops, the narrow pulses produced by the race-hazard of the clock signal are used to control the latch. In the proposed design scheme, literal functions are realized by using neuron-MOS transistors. Then, the pass transistors used to pass ternary signal are controlled by the outputs of the literal...
Novel CMOS D-type and modular algebra-based edge-triggered ternary flip-flops using double pass-transistor logic(DPL), are presented. In the proposed circuit scheme, literal functions are also realized by using traditional MOS transistors without any modification of the thresholds. The DPL-based flip-flop has some favourable properties: perfectly symmetrical structure, full logic swing and the maximum...
Much attention has been paid to dynamic circuits and multi-logic technology in current low power design. In this paper, a new structure and the design methodology of the ternary dynamic BiCMOS circuit has been proposed based on the structure of the ternary dynamic CMOS circuit. The circuits designed following this methodology have shown advantages not only in heavy integration density, low power,...
A new static ternary double pass-transistor logic (TDPL) has been developed with some favourable properties: perfectly symmetrical structure, full logic swing and the maximum possible noise margins, the use of the standard CMOS process without any modification of the thresholds, the less complex structure, and no static power consumption. The proposed scheme consists of complementary inputs/outputs...
This paper represents the status quo of the experimental teaching for high frequency electronic circuit, and points out the drawbacks of traditional experimental teaching. On this basis, propose hierarchical teaching contents and their corresponding experimental capacity-building programs, so that teachers can take different teaching methods and teaching evaluation systems in accordance with different...
The famous Antosik-Mikusinski convergent theorem on the Abel topological groups has very extensive applications in measure theory, summation theory and other analysis fields. In this paper, we establish the theorem on a class of effect algebras equipped with the ideal topology. This paper shows also that the ideal topology of effect algebras is a useful topology in studying the quantum logic theory.
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