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We propose a molecular modeling method which is capable of modeling the mechanical impact of the porosity and pore size to the amorphous silicon-based low-dielectric (low-k) material. Due to the electronic requirement of advanced electronic devices, low-k materials are in demand for the IC backend structure. However, due to the amorphous nature and porosity of this material, it exhibits low mechanical...
This paper presents our effort to predict IC, packaging, and board level reliability problems. Micro-electronic based reliability problems are driven by the mismatch between the different material properties, such as thermal expansion, hygro-swelling, and/or the degradation of interfacial strength. In the past, such reliability problems were treated separately, but recent development have made clear...
At present, a lot of delamination related reliability problems are observed in the micro-electronic industry. Examples are: die-lift; downbond stitch breaks associated with diepad delamination; passivation cracks related to interface delamination between chip and moulding compound. These reliability problems are driven by the mismatch between the different material properties, such as CTE, hygro-swelling,...
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