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A novel on-chip CMOS current sensor implemented by switched capacitors for a current — mode buck converter is presented in this paper. This proposed current sensing circuit does not need another sense MOSFET and a voltage-to-current and current-to-voltage transform circuit. We use the 0.35um DPTM CMOS process to design and simulate this circuit. Test result shows that the accuracy and the speed of...
A drive system for active-matrix OLED panel is presented. The developed system comprises a digital interface which can receive DVI or MCU signals directly, a digital control part, a SRAM for storing display information, common drivers, and the 64-step gray scale segment drivers. Both common driver and segment driver is capable to be cascaded, so it can drive panels in different resolutions by using...
A low power high speed Readout Integrated Circuit(ROIC) design for 320 × 320 IRFPA is proposed in this paper. The ROIC operates as follows: after integration phase, voltages on column bus of odd rows and even rows are read out alternately. And the results are sampled and stored alternately on two sample capacitors added at the output point of column CSA. When sample capacitor for odd row samples and...
This paper proposes a new structure of LED(Light-emitting diode) driver for obtaining a low mismatch output current between different channels and even reduces the chip area. It's fabricated with TSMC 0.35µm DDD process. The chip contains 16 channels and the maximum/minimum output current is 3mA/45mA, respectively. The value of each channel's output current is the same and controlled by a programmable...
A capacitor mismatch auto-compensation circuit has been designed and implemented for MEMS gyroscope differential capacitive sensing circuit. An in-chip capacitor array that controlled by the 7-bit SAR is selected to be connected in parallel with one of the gyroscope capacitor, making the two differential capacitors of the gyroscope equal. The compensation progress only takes eight periods of the clock...
The paper presents a low-noise high voltage (HV) CMOS Interface ASIC designed for MEMS vibratory gyroscopes. A closed-loop control is realized in the driving mode. An in-chip level shifter is designed in the loop to achieve a high DC voltage level of 5V which can excite the gyroscope. A DC biasing method is adopted in the interface circuit to convert the amplitude-modulated capacitive signal into...
A highly efficient approach to improve PSRR behavior of Kuijk BGR topology is derived though small signal transfer function analysis and, a BGR circuit has been designed and fabricated on standard 0.5μm CMOS technology to verify this method. This thought greatly relieves the trade-offs of BGR circuit design among power consumption, PSRR performance, area and etc.. This BGR circuit consumes 3μA current...
A new structure 288 ?? 4 CMOS time delay and integration (TDI) readout integrated circuit (ROIC) is presented in this paper. The TDI function is implemented using an integration and storage circuit array and a charge amplifier with the advantages of low power and compact layout. An experimental chip has been designed and fabricated in 0.5 ??m double-poly-three-metal CMOS technology. Bi-directional...
A low power Read-Out Integrated Circuit (ROIC) for a short-wave Infra-Red Focal Plane Array (IRFPA) is designed as a prototype for 1024??1024 image system. Ripple integration and readout scheme as well as highly efficient power management is introduced to this design in order to decrease total power dissipation. To overcome the charge sharing problem caused by this low power readout scheme, novel...
A high efficient analog charge delay line (ACDL) is proposed in this paper. We can use these analog delay lines to realize high performance CMOS readout integrated circuits (ROIC) with time delay integration (TDI) function. A CMOS ROIC for 288 times 4 IRFPA were designed, manufactured, and tested. The chip has 4 video outputs, whose pixel frequency is 4~5MHz (for 384 times 288 format, its frame frequency...
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