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This paper introduces one of the first efforts conducted at NASA's Jet Propulsion Laboratory (JPL) to develop a generic System-on-Chip (SoC) platform to control science instruments that are proposed for future NASA missions. The SoC platform is named APEX-SoC, where APEX stands for Advanced Processor for space Exploration, and is based on a hybrid Xilinx Zynq that combines an FPGA and an ARM Cortex-A9...
We present here one of the first research efforts conducted at Jet Propulsion Laboratory (JPL) to implement on a single chip (Xilinx Zynq) all the functionality necessary to control a NASA instrument, namely a Fourier Transform Spectrometer (FTS) that is proposed for deployment on future missions to Jupiter's moon Europa. The system requires custom logic to process the data delivered by the instrument,...
This paper presents an adaptive controller for CIRIS (Compositional InfraRed Interferometric Spectrometer) implemented on a stand-alone field programmable gate array (FPGA) architecture with emphasis on space applications in radiation environments such as Europa. CIRIS is a novel take on traditional Fourier Transform Spectrometers (FTS) and replaces linearly moving mirrors (characteristic of Michelson...
This paper presents the design and integration of an adaptive controller for CIRIS (Compositional InfraRed Interferometric Spectrometer) on a stand-alone field programmable gate array (FPGA) architecture. CIRIS is a novel take on traditional Fourier Transform Spectrometers (FTS) and replaces linearly moving mirrors (characteristic of Michelson interferometers) with a constant-velocity rotating refractor...
Four sealing methods for encapsulating samples in 1 cm diameter thin-walled sample tubes were designed, along with a set of tests for characterization and evaluation of sample preservation capability for the proposed Mars Sample Return (MSR) campaign. The sealing methods include a finned shape memory alloy (SMA) plug, expanding torque plug, contracting SMA ring cap, and expanding SMA ring plug. Mechanical...
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