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A novel monitoring test structure is proposed for plasma process-induced charging damage (PID) based on charge-based capacitance measurement (CBCM), referred to as PID–CBCM. By eliminating antenna capacitance interferences, a remarkably smaller gate capacitance (tens of fF) can be obtained for effectively evaluating the influence of PID on metal oxide semiconductor field-effect transistors (MOSFETs)...
A highly effective and versatile test structure with a flexible pulse generating circuit is proposed. Several significant features of the key components are demonstrated, that is, the tunable ring oscillator, the start-stop pulse controller, the Charge Injection induced Error Free Charge Based Capacitance Measurement (CIEF-CBCM) using Self-Aligned pulses and the modified Charge Pumping (CP) technique...
A Novel Ioff measurable MOSFET array has been developed. Body bias of peripheral circuit is controlled in order to eliminate the unwanted leakage current in peripheral circuit. SPICE simulation results indicate 10−14A or less of Ioff can be measured, and it is demonstrated that around 10−12A of Ioff can be measured directly without any additional correction measurement. Since it can be fit into scribe...
We have successfully developed the new design of MOSFET array structure with high accuracy measurement both for Ion excluding IR drop and Ioff without contamination. We propose measurement algorithm “feedback looped biasing” with kelvin probe structure and canceling method for leakage contamination due to array peripherals. This test structure is implemented in scribe line for 28nm technology and...
We propose monitoring test structure and measurement technique for plasma process induced charging damage (PID) using charge-based capacitance measurement (CBCM). For evaluating the influence of PID on MOSFET effectively, remarkably small (several tens of fF) gate capacitance of MOSFET can be extracted by eliminating parasitic antenna capacitance. Moreover, we can extract interface trap density from...
We developed a new test structure consisting of a MOSFET array that can accurately measure off-leakage current (Ioff). The features of this structure are that MOSFETs' source and drain are directly connected to probing pads and that each pair of source and drain terminals is unshared to avoid Ioff contamination by untargeted MOSFETs. The structure is implemented in scribe lines for the 90nm technology...
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