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A wider band gap (2.3eV) material In0.5(Al0.7Ga0.3)0.5P based BSF layer lattice matched with both top In0.49Ga0.51P and bottom GaAs cell is found to increase 6% more efficiency than other widely used Al0.7Ga0.3As material under the same cell configuration because of its high photo generation rate. A numerical simulation analysis of these BSF layer in InGaP/GaAs dual-junction solar cell is investigated...
An analytical model for tunnel barrier modulation in triple metal double gate tunnel FET is presented for the first time in this paper. Three different metals over the channel region assist to form a barrier in the channel which restricts the reverse tunneling of the carrier, i.e., tunneling from drain to source. The choice of three metals with different work functions helps to increase the ON-current...
Hybridization between CMOS logic and single electron transistor has already revolutionized our present nano technological aspects. Ultra low power consumption as well as ultra dense circuit formation is now possible with the help of mutual integration between the two mentioned above. These benefits have drawn the attraction of the future researchers in this hybrid SET-CMOS technology for future nano-scale...
The co fabrication of S ET & CMOS technology has already proved its ability to bring a drastic change in the era of nanodimensional devices. In our present work a well known combinational circuit, octal to binary encoder is demonstrated using hybrid SET-CMOS technology in 22 nanometer node. We have presented power analysis for the circuit here. Power delay product for the circuit has also been...
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