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To deal with the communication challenges of current and future many-core architectures, Network-on-Chip (NoC) has been proposed as a promising alternative. Regular 2D mesh topology is the most preferred design choice for NoCs. Hardware failures owing to manufacturing, wear-out, aging etc., however, may disrupt the regularity of 2D mesh. Sustaining routing under these circumstances becomes a challenge...
Network-on-Chip (NoC) is one of the promising communication architecture to provide scalability for many core designs. However, deep sub-micron technology related effects impact NoC reliability. Hence under this condition NoC must continue to provide at-least a path between each pair of its components as long as path is available. In this paper we propose fault tolerant routing implementation solution,...
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