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In this contribution, we present a 60 GHz design of a connected array of slots combined with artificial dielectric layers (ADLs). The antenna array consists of 2×8 connected-slot elements, fed coherently with a corporate feeding network. The array is loaded with an artificial dielectric slab with high permittivity, which has the advantage of enhancing the forward radiation without supporting surface...
This paper presents a 107GHz LNA prototype using TSMC 65nm CMOS technology. It explores the limit of the CMOS technology by effectively optimizing the active and passive devices. An improvement of 1.6dB higher maximum stable/available gain (MSG/MAG) on the transistor is achieved around 110GHz by layout optimization and inductor neutralization technique. A high quality factor co-planar waveguide (CPW)...
A 73 to 83 GHz injection-locked oscillator (IJLO) is realized in TSMC 65-nm CMOS technology. By using the frequency-sweeping method, a 10 GHz total locking range is achieved with -35 dBm injection power. The power consumption is 9 mW from a 1-V supply. Additional 4 mW and 6 mW are consumed for the input and output buffers respectively for the measurement purpose. The measured sensitivity of the IJLO...
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