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Several-ten nanometer-width Ge Fin structure with defect-free, vertical and smooth sidewall were successively delineated by a neutral beam etching method using pure Cl2 gas chemistry for developing three dimensional channel FETs. The cross-sectional profile of the Ge Fins tended to have bottom tails without undercuts beneath etching masks in the best etching conditions. The bottom tails were eliminated...
The non-local band to band tunneling model developed and implemented into the three-dimensional device simulator by the authors is evaluated for the tunnel-FET modeling focused on device geometry effects. Measured characteristics of SOI, Fin, and parallel-plate silicon tunnel FETs fabricated by the authors are compared with simulations based on the non-local model. Although each device structures...
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