The non-local band to band tunneling model developed and implemented into the three-dimensional device simulator by the authors is evaluated for the tunnel-FET modeling focused on device geometry effects. Measured characteristics of SOI, Fin, and parallel-plate silicon tunnel FETs fabricated by the authors are compared with simulations based on the non-local model. Although each device structures have specific features in their electrical characteristics, the non-local model explains the various geometry effects very well throughout the comparisons. From these comparisons, validity and predictivity of the non-local model is ensured for the device design of tunnel FETs.