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Two fully integrated laterally diffused MOS (LDMOS) class AB power amplifiers (PA) are presented. The PAs are fabricated in 0.18 µm power management platform, which is integrated with a standard logic technology CMOS process. The single stage PA utilizes LC matching to achieve a peak output power of 31.4 dBm at 3.8 GHz. A small signal gain of 5.2 dB and a maximum drain efficiency (DE) of 24.3 % are...
Power Management Integrated Circuits (PMIC) chips contain large power switches - usually LDMOS transistors, along with low current control circuitry. During transistor switching, charge carriers are injected into the substrate and affect the surrounding devices. In junction isolated technologies, hole injection is effectively suppressed using highly doped n-type layers, while electron injection requires...
Power Management Integrated Circuits is one of the fastest growing markets in the semiconductor industry, with increasing demand for efficient electronic devices and dense integration schemes. Power over Ethernet designs are some of the most challenging, incorporating multiple channels of large High Voltage FET drivers, along with dense logic cores and high precision analog. The extreme amount of...
We describe modular voltage and current isolation schemes in a Power Management Integrated Circuit (PMIC) silicon platform. The isolation reduces the power dissipation during switching at the high side driver. It also suppresses the cross talk between power devices switching up to 60V at several Amps, and sensitive analog / digital circuitry on the same chip. Standard, buried layer and Isolated Drain...
We describe a Zener diode integrated in a 0.18 micron based 60 V Power Management Process platform. By adding one ion implant layer, a buried diode with a sharp reverse breakdown current slope is implemented. A steep rise in reverse current, from 10-8 A to 10-3 A is obtained at the breakdown region, over less then 100 mV voltage variation. The buried interface has shown no breakdown voltage shifts...
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