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Airgap refers to a void inserted in some inter metal dielectric (IMD). It brings about reduced permittivity and corresponding reduction in coupling capacitance. We address a problem of selective airgap insertion in clock wires to reduce clock skew as well as power consumption. This is performed after conventional clock tree construction and optimization, so the reduction in clock skew due to inserted...
Crosslinks may be inserted in a few clock tree nodes to reduce on-chip variation induced clock skew, simply called OCV skew. A change in clock transition and clock latency should be accurately estimated and be reflected in crosslink insertion algorithm, which we study. Fast estimation of OCV skew is important, which we also address. Crosslink insertion problem is modeled into a graph, and is solved...
Electrothermal analogy allows a resistive or RC network to be used for simple and convenient thermal analysis; however, it is only valid when heat transfer is purely convective or conductive. We investigate the analogy when a chip's operating environment is not purely convective, e.g. convective atmosphere with some source of heat flux, which is typically the practical case. We mathematically show...
The heat equation and the electrothermal equation are widely used in chip design, and generally supposed to be equivalent. We prove this equivalence in mathematical manner, but show that it is only valid when the boundary condition is convective. Recent technologies have a much increased leakage power, which is highly temperature-dependent. The modified thermal equations which model this dependency...
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