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This paper presents a new NAND Flash Translation Layer, called MH-FTL, for Mass data storage devices based on Hybrid address translation, which improved the performance of mass data storage markedly. Firstly, MH-FTL decreases memory space of the address mapping table greatly by three levels address mapping method, including block group level address translation (BGAT), block level address translation...
In order to realize high-precision image registration, a subpixel registration algorithm based on gray scale projection is presented. In traditional gray scale projection algorithm, sum of absolute difference is used to perform the correlation process where pixel-level image registration precision is measured. In this paper, we use cross power spectrum method to translate the computing from spatial...
The article presents a FPGA based novel embedded automobile data acquisition system, which records vehicle's, environment's and driver's operation information intuitively. The data acquisition system is useful in the fields of traffic accident analyze and accident responsibility confirmation. The core of system is Altera's Nios II processor in FPGA. According to the trigger conditions set by users,...
This article introduced a design principle and implementation method of ultra high-speed Time-to-Digital Converter(TDC). It described the system's composition in hardware and software view. The system is composed of serial-parallel converter MAX3953, high-speed clock generator AD9518, Spartan-6 series FPGA XC6LX100T and high-speed DDR3-SDRAM. Software includes FPGA program and user application software...
PXIe protocol is a novel high-speed transmission bus protocol in industry. PXIe not only offers high performance up to 500MB/s bandwidth (4 lines), but also is completely compatible with PCI Express protocol. However, the current implementation in FPGA can not make full use of its advantages. The paper describes a direct memory access system to improve the real bandwidth of PXIe bus. For direct memory...
High-speed parallel transmission is significant for the study of high-speed transmission. The high-speed serial transmission has high performance whereas costs large amount of hardware and calls for complex implementation. Reduction of data valid window, data and clock skew, and clock jitter are three crucial negative factors for high-speed parallel transmission. The paper analyses these factors,...
The paper proposed a new method of global subdivision that combines geographical coordinates and the thinking of regular polyhedron's recursive Subdivision. It Subdivides the earth directly on the sphere, with no internal polyhedron and no projection. Subdivision units use similar rhombus. The method can achieve a seamless sphere without overlapping, with any resolution adopted subdivision. As the...
This paper is focus on the realization of signal beam forming (DBF) for base band signal through band-pass sampling, I / Q digital branch decomposition and digital filtering. In order to make more rational use of modern electronic tools, make full use of DSP's computing power, give prominence to FPGA's strong logic processing capacity and fast speed, a combination of both will be used. In the FPGA,...
This article introduced a design principles and implementation method of a high resolution programmable digital delay generator. It described the system's composition in hardware and software view. This system is composed of deserializer MAX3885, high-speed clock generator AD9517-1, DDR2 SDRAM, serializer and USB2.0 Controller. Paper described FPGA software design methods includes DDR2 SDRAM controller...
The multi-source spatial information code is the key of spatial data organization, and the base of spatial information searching, retrieval and the data mining.In this paper, the author establish a spatial information cataloging system combined with the current characteristics and application of multi-source according to the shortage of traditional coding technology. The author also proposed a set...
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