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We consider the general problem of the efficient and accurate determination of the yield of an integrated circuit, through electrical circuit level simulation, under variability constraints due to the manufacturing process. We demonstrate the performance of our general-purpose Importance Sampling based algorithm for the case of an industrial SRAM application. Section 1 reviews the notions of yield...
Sub-threshold operation of circuits becomes more and more attractive due to the ultra-low power consumption. Static Random Access Memory (SRAM) faces an important limitation in read access time that prevents high frequency operation and the possible applications. The read access time under ultra-low voltage (ULV) operation is mainly dictated by the read current of the SRAM bit cell and the bit line...
The tendency for low energy consumption in systems-on-chip results in a need for memories operating in the near- and sub-threshold regions. This paper gives a comparative study of Static Random Access Memory (SRAM) bitcells working under Ultra-Low Voltage in 32nm CMOS. A new 10T SRAM bitcell is then proposed and features low leakage current. It is capable of operation under ULV (∼300mV) and allows...
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