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This paper presents a 14nm technology designed for high speed and energy efficient applications using strain-engineered FDSOI transistors. Compared to the 28nm FDSOI technology, this 14nm FDSOI technology provides 0.55× area scaling and delivers a 30% speed boost at the same power, or a 55% power reduction at the same speed, due to an increase in drive current and low gate-to-drain capacitance. Using...
Device electrical parameters and performance after optimization are often presented in literature. However, publications rarely address device stability versus process dispersion. Such a study was performed on the high-speed Si/SiGe heterojunction bipolar transistor (HS HBT) from a millimeter-wave BiCMOS technology. The process parameters were intentionally de-centered during the fabrication to monitor...
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