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A novel quaternary D-flip-flop is proposed by using dynamic source-coupled logic (SCL) for high performance processing element in VLSI system. Its key components, the threshold detectors, are based on differential-pair circuit (DPC). The combination of multiple-valued source-coupled logic and differential-pair circuit makes it low power and more compact. The performance is evaluated by HSPICE simulation...
In order to improve the performance of arithmetic VLSI system, a kind of multiple-valued current-mode (MVCM) circuitry based on dynamic source-coupled logic is presented. Using the circuitry, a 4-quatrit quaternary adder based on conditional sum algorithm is proposed, which implements 8-bit addition operation. The use of conditional sum logic improves the speed of calculating. The design is evaluated...
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