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This paper presents an integrated 60 GHz sliding-IF receiver fabricated in a 0.25 μm SiGe BiCMOS technology. The receiver chain consists of a front-end and an IF IQ demodulator centered at around 12 GHz. A 48 GHz PLL is used to generate the front-end LO signal and the IF quadrature LO signals. The measured LNA noise figure is around 6.6 dB. Digital words are used to control the VGA gains and IQ mismatches...
In this work, a 122 GHz transmitter circuit using frequency doublers is realized in 0.13 μm SiGe:C BiCMOS technology with fT/fmax of 250/315 GHz. Two versions of the frequency doubler based on the balanced topology with cascode transistor are implemented. In the basic version, the peak conversion gain was -9 dB with -6 dBm output power. In the improved version the peak conversion gain is...
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