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The use of embedded fault-tolerant mechanisms in Network-on-Chips (NoCs) has become essential to ensure connectivity in the presence of massive defects, and consequently improving the yield. According to the number of defects and their location in NoC, the fault tolerant techniques can be very expensive in terms of area, performance and energy overhead. The use of testing and diagnosis can help to...
The use of embedded fault-tolerant mechanisms in Network-on-Chips (NoCs) has become essential to ensure connectivity in the presence of massive defects, and consequently improving the yield. According to the number of defects and their location in NoC, the fault tolerant techniques can be very expensive in terms of area, performance and energy overhead. The use of testing and diagnosis can help to...
A strategy to handle multiple defects in the No Clinks with almost no impact on the communication delay is presented. The fault-tolerant method can guarantee the functionally of the NoC with multiple defects in any link, and with multiple faulty links. The proposed technique uses information from test phase to map the application and to configure fault-tolerant features along the NoC links. Results...
A novel approach to handle multiple defects in the NoC links is presented. The fault-tolerant method can guarantee the functionally of the NoC with multiple defects in any link and with multiple faulty links. The proposed technique uses information from test to know where and when fault-tolerant features must be turned on. Comparisons with popular solutions based on EDAC show that the proposed method...
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