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A 0.18 μm CMOS digitally controlled DC-DC buck converter is presented. An all-digital 8 b frequency-domain ΔΣ ADC is used for the feedback path, and a 9 b segmented digital PWM is used for power stage control. A regulated output voltage accuracy of 1% and maximum efficiency of 94% is achieved with less than 14 mVpp ripple and a settling time of 100 μs for a 300 mA load transient.
This paper describes a novel feedback digitization architecture for a digitally controlled PWM DC-DC buck converter. A multi-bit Sigma-Delta frequency discriminators (MB-SDFD) is used. This multi-bit parallelization technique is an extension to the first-order Sigma-Delta frequency discriminators (SDFD) concept. SDFD concept is based on a non-feedback Sigma-Delta modulator that uses FM signal as its...
Pulse width modulation (PWM) and sigma delta modulation (SDM) have been used in several high linearity, high accuracy power delivery applications such as DC-DC power converters, audio and RF power amplifiers as well as in data converters. In this paper, we present a particular class of carrier frequency modulated PWM (CFMPWM), which spreads the tonal content of regular PWM uniformly in frequency and...
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