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Voltage overscaling for power reduction in RF systems has been limited by the need to maintain sufficient overscaling guard bands to ensure that minimum signal quality requirements of the end to end communication link are met. In this paper, we propose error control mechanisms at the symbol (probabilistic symbol remapping) and bit levels (code based correction and feedback) that allow more aggressive...
As technology scales below the 45 nm CMOS technology node, RF front ends and baseband processors will need to be aggressively over designed to work reliably under worst case channel (environment) conditions as well as worst case manufacturing variations. In this paper, a new dual feedback based design approach is proposed that allows the baseband unit of a wireless OFDM system to adapt dynamically...
In many DSP applications (image and voice processing, baseband symbol decoding in high quality communication channels) several dBs of SNR loss can be tolerated without noticeable impact on system level performance. For power optimization in such applications, voltage overscaling can be used to operate the arithmetic circuitry slower than the critical circuit path delay while incurring tolerable SNR...
As channel conditions in wireless communications improve, the noise performance of the baseband DSP processor can be degraded to save power without compromising bit error rate. The degradation of baseband signal noise is achieved by degrading the noise performance (reducing the wordlength and supply voltage) of the various baseband signal processing modules in specific proportions defined by a locus,...
Modern wireless communication systems are designed for worst-case channel noise and interference conditions. This results in circuits that over-perform and consume more power than necessary most of the time when channel conditions are not worst-case. In this paper, we propose a power savings methodology that allows "graceful degradation" of baseband system performance when channel conditions...
Soft errors due to alpha particles, neutrons and environmental noise are of serious concern in highly scaled CMOS circuits. This mandates the use of error/noise tolerance mechanisms in circuit design. Prior work has addressed error correction and compensation techniques for linear digital systems using checksum codes. However no low-cost checksum based technique is found in the literature for nonlinear...
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