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Floating point (F.P.) addition is a core operation for a wide range of applications. This brief presents an area-efficient, dynamically configurable, multiprecision architecture for F.P. addition. We propose an architecture of a double precision (DP) adder, which also supports a dual (two parallel) single precision (SP) computational feature. Key components involved in the F.P. adder architecture,...
Performance estimation of an application on any processor is becoming a essential task, specially when the processor is used for high performance computing. Our work here presents a model to estimate performance of various applications on a modern GPU. Recently, GPUs are getting popular in the area of high performance computing along with original application domain of graphics. We have chosen FERMI...
Quantum-dot Cellular Automata (QCA) is a nano-scale compute fabric being explored by the VLSI research community as the difficulties in shrinking CMOS transistors mount. The paradigm promises high device densities and power-efficiency, and has unique properties that make it an interesting candidate for programmable devices. In this work, we propose a specialized architecture for programmable devices...
Quantum-dot Cellular Automata is an interesting computation fabric with many never-seen-before properties. However, no programmable fabric scheme has utilized all these properties effectively. We propose an architecture for a programmable device using QCA which exploits all the specialities of the fabric. The architecture taps the flexibility provided by the clocking system of QCA to build a simple...
This paper deals with a methodology for software estimation to enable design space exploration of heterogeneous multiprocessor systems. Starting from fork-join representation of application specification along with high level description of multiprocessor target architecture and mapping of application components onto architecture resource elements, it estimates the performance of application on target...
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