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This work presents a special class of a data flow oriented optimization tool that finds the optimal number of threads for multi-thread software. Threads are assumed to encapsulate concurrent executable key functionalities, are connected through finite capacity queues, and require certain hardware resources. We show how a combination of measurement and calculation, based on Queueing Theory, leads to...
Already, hundreds of millions of PCs are found in homes, offering high computing capacity without being adequately utilized. This paper reveals the potential for energy saving in future home environments, which can be achieved by sharing resources, and concentrating 24/7 computation on a small number of PCs. We present three evaluation methods for assessing the expected performance. A newly created...
Home networks recently gain importance due to their development from pure internal networks in form of an Ethernet LAN to converged networks integrating home, Internet, and access provider infrastructure. In emerging future home networking scenarios, service provisioning and network management is proposed by distributed architectures forming virtual home environments (VHEs). This paper provides a...
Hintergrund. Bei Versagen konservativer Manahmen kommt bei der Dakryozystitis im Kindesalter eine Dakryozystorhinostomie (DZR) in Betracht. Indikationsstellung, Besonderheiten und Ergebnisse wurden retrospektiv berprft. Patienten und Methode. Es wurden 72 Kinder im Alter von 10 Monaten bis 14 Jahren wegen einer persistierenden Dakryozystitis mit einer DZR versorgt und fortlaufend dokumentiert. Nachuntersucht...
A single supply, 5 Volt 64k-bit dynamic MOS random access memory chip using some new design features such as boostet wordlines, quiet wordline flip-flops, active restore circuits, substrat bias equalization circuit etc. will be presented.
High-voltage MOS transistors fabricated in an ESFI-SOS technology have been investigated. Breakdown voltages exceeded 120 V. As application 100 V LCD-drivers employing dynamic bootstrap and static push-pull circuit techniques will be presented.
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