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A hybrid CDR is presented that embeds a 5 blind-oversampling CDR within a conventional phase-tracking CDR. This hybrid CDR has a jitter tolerance that is the product of the individual jitter tolerances. In this implementation, the jitter tolerance of a phase-tracking CDR alone is increased by a factor of 32 at frequencies below its loop filter's bandwidth, while maintaining the high-frequency jitter...
A hybrid CDR increases jitter tolerance of a phase-tracking CDR by a factor of 32 at low frequencies, while maintaining the high-frequency jitter tolerance of a 5times blind-oversampling CDR. Measurements on a 0.11 mum CMOS test chip at 2.4Gb/s confirm a 200Ulpp jitter tolerance at 200kHz. At 2.4Gb/s, the chip consumes 180mW from a 1.2V supply
A 20Gb/s simultaneous bidirectional transceiver uses a resistor-transconductor hybrid in a standard 0.11 mum CMOS process. The 7mW hybrid works in a continuous-time domain without any replica driver and eliminates the need for the precise matching between the replica- and main-driver characteristics
A 1.2V 40Gbit/s 4:1 MUX and 1:4 DEMUX are implemented in a in 90nm digital-compatible standard CMOS technology. The MUX and DEMUX operate from a 1.2V supply and draw 110mA and 52mA, respectively. Experimental results show a clear eye opening of 300mV/sub pp/ for the MUX and that of 540mV/sub pp/ for the DEMUX at 40Gbit/s.
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