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A UHF RFID reader receiver is implemented in 0.18μm CMOS. The direct-conversion receiver consists of an LNA, passive mixers, baseband PGAs and LPFs. As high as 18.5dBm measured IIP3 of the RF front-end is achieved by using passive mixers driven by 25% duty cycle square wave LO. The receiver has a sensitivity of -77dBm in the normal mode and -87dBm in the LBT mode. The total power dissipation in the...
This paper presents a 2.4GHz, reconfigurable RF LNA using on-chip peak detection and calibration to measure and optimize its input impedance (S11) and gain (S21) in-situ, compensating for the unpredictable effects of process, voltage and temperature (PVT) variations. Measurement results show that the calibration of the LNA across PVT corners improves the S11 by 5.1dB, S21 by 3dB, while not significantly...
A multi-standard transceiver requires a wide-band radio frequency front-end in order to process RF signals of any frequency included by all the standards concerned. A noise cancellation technology is utilized in the low noise amplifier (LNA) to cancel the noise introduced by the source resistance matching segment. An active balun is embedded in the input stage of the mixer, which connect the single-end...
A low power monolithic reconfigurable direct-conversion receiver RF front-end for 802.11a/b/g applications is presented. It consists of a reconfigurable LNA and a high linearity quadrature down-converter. The LNA could be switched between two operation bands by utilizing a fully-differential switchable inductor. With a positive feedback, the noise figure of the common gate LNA is lowered down. The...
Techniques are proposed to enhance the bandwidth of ultra-wideband (UWB) CMOS low-noise amplifiers (LNA). By using multiple-input-branch technique and resistive shunt- feedback technique, LNA could achieve ultra-wideband input impedance matching with small noise figure degradation. The gain bandwidth is enhanced by an L type inter-stage matching network between the input transistors and the cascode...
A superheterodyne receiver front-end with on-chip automatically Q-tuned notch filters is proposed. The front-end includes a differential LNA and a Gilbert down-converter, each block is coupled with an on-chip image-rejection notch filter to get high image-rejection ratio. The notch filter is formed by one LC network and one negative-resistance cross-coupled pair to compensate the loss of the LC network...
A 0.18mum CMOS 2.4GHz LNA (low noise amplifier) with digitally switchable capacitance has been designed to investigate its ability to compensate for performance variation across worst case process conditions. The effects of transistor model and passive component variation are first simulated to quantify the range of performance uncertainty. The use of various methods of switchable capacitance is then...
Ultra wideband (UWB) radio technology has many advantages: i.e., ultra wide 7.5 GHz spectrum bandwidth, extremely high throughput, very low power, etc. This paper presents a single-chip low-power 3.1-10.6 GHz low-noise amplifier (LNA) designed for pulse-based full-band UWB transceivers, which features an improved shunt-series feedback topology to achieve desirable ultra broadband gain and noise performance...
In this paper, a single-chip pulse-based, non- carrier, full-band, low power ultra wideband (UWB) transceiver system-on-a-chip (SoC) for high data rate wireless video/audio/multimedia streaming applications is presented. This UWB SoC features a single full-band (7.5 GHz bandwidth from 3.1 GHz to 10.6 GHz), pulse-based non-carrier architecture to achieve high throughput (>100 Mbps) and high simplicity...
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