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This paper describes the fabrication process and device performance of CMOSFET with direct silicon bonded (DSB) substrate. This works offers the first comprehensive evaluation of source/drain engineering for DSB devices. Scanning spreading resistance microscopy (SSRM) technique reveals specific dopant profile that lateral diffusion along the bonding interface, in addition to the highly activated dopant...
In this paper, dopant segregation (DS) method is adopted to enhance device performance of PtSi-based Schottky-barrier source/drain MOSFETs (SB-MOSFETs) fabricated on ultrathin silicon-on-insulator. The DS formation is realized by means of Silicide As Diffusion Source. Without DS treatment, the devices are typically p-type, but with a rather large electron branch at positive gate bias. Dopant segregation...
We study the variability of the electrical characteristics of silicon-on-insulator (SOI) SB-MOSFETs. A new method by extracting the variation of the threshold voltage from a large number of devices with different SOI thicknesses enables determining the main sources of variability and distinguishing between them. It is found that the device-to-device variability is mainly due to the inherent variation...
The SSRM in vacuum is proven to have sufficiently high spatial resolution for 2D profiling of ultra-shallow junctions of ~10 nm. An extremely small effective probe radius of 0.5 nm has been shown to be available with our SSRM systems. Halo distribution influence on roll-off characteristics has been directly observed. SSRM has been shown to have great potential for 2D characterization of next-generation...
Two-dimensional characterization of ultra-shallow junction CMOSFETs is performed by scanning spreading resistance microscopy (SSRM). Reproducible SSRM images with high spatial resolution are obtained by measuring in vacuum, and the wearing out characteristics of probes are also improved. Halo distribution of ultra-shallow junctions has very limited lateral diffusion and shows variation with decreasing...
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