The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Random numbers play a vital role in cryptography, where they are used to generate keys, nonce, one-time pads, and initialization vectors for symmetric encryption. The quality of random number generator (RNG) has significant implications on vulnerability and performance of these algorithms. A pseudo-RNG uses a deterministic algorithm to produce numbers with a distribution very similar to uniform. True...
We propose an implementation of a secured content addressable memory (SCAM) based on homomorphic encryption (HE), where HE is used to compute the word matching function without the processor knowing what is being searched and the result of matching. By exploiting the shallow logic structure (XNOR followed by AND) of content addressable memory (CAM), we show that SCAM can be implemented with only additive...
A novel method for determining input capacitance of power MOSFETs is proposed. Through measurements of gate charge transfer trajectories during switching, gate-source capacitance and drain-gate capacitance are determined. The capacitance models obtained by the proposed method simulate switching waveforms accurately and reduce timing errors by more than 16 times when compared to the conventional model...
Replacement of highly stressed logic gates with internal node control (INC) logics is known to be an effective way to alleviate timing degradation due to NBTI. Various INC replacement algorithms have been proposed, but there are no evaluations for the necessity of the signal probability update and the aged delay calculation during optimization, which are highly CPU intensive. Also, the mitigation...
As the transistor process technology continues to scale, the aging effect posits new challenges to the already complex static timing analysis (STA) process. In this paper, we first observe that aging can be thought of a type of correlated dynamic on-chip variations (OCV), and identify the problem introduced by such type of OCV. In particular, we take the negative bias temperature instability (NBTI)...
Negative bias temperature instability (NBTI) has become one of the major reliability concerns for nanoscale CMOS technology. The NBTI effect degrades pMOS transistors by stressing them with negatively biased voltage, while the transistors heal themselves as the negative bias is removed. In this paper, we propose a cross-layer mitigation technique for NBTI-induced timing degradation in processors....
In this paper, a novel circuit simulation model for V-groove SiC power MOSFET with buried P-layers is proposed. By considering the structure of the MOSFET, bias dependence of on-resistance and the kink in the terminal capacitance are represented in the proposed model. Through experiments using a V-groove SiC MOSFET, it is demonstrated that the proposed model successfully reproduces both I-V and C-V...
This paper proposes RTN-PUF, a novel PUF that utilizes random telegraph noise (RTN) of transistors as the physical uniqueness of individual devices. Our proposed RTN-PUF generates a response from a pair of ring oscillators (ROs) by comparing the numbers of frequency changes, which depend on the time constants of RTN. Due to the log-uniform distribution of the time constants, our RTN-PUF provides more...
A fast calculation tool for state-dependent capacitance of power distribution network is proposed. The proposed method achieves linear time-complexity, which can be more than four orders magnitude faster than a conventional SPICE-based capacitance calculation. Large circuits that have been unanalyzable with the conventional method become analyzable for more comprehensive exploration of capacitance...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.