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This paper presents a 3rd-order continuous-time direct RF-to-digital ΔΣ receiver architecture for flexible receivers. Adopted passive mixer with inherited high-Q bandpass filtering and passive integrator enables a low complexity and low power consumption implementation. Moreover, high flexibility can be achieved thanks to a flexible frequency plan of the architecture. In order to verify the features...
This paper presents a novel dynamic element matching technique (DEM) suited for high pass (HP) Delta Sigma (ΔΣ) modulators. It is based on transforming the high pass filtering behavior of classical DEM algorithms into a low pass behavior to make them adapted for HP ΔΣ modulators. The proposed technique is demonstrated for the data weight averaging (DWA) algorithm at the system level and the electrical...
This paper presents a design example of an ultra-low power single-channel analog front-end (AFE) integrated circuits (IC) and system for biomedical sensing applications. The 0.18-µm CMOS AFE IC design includes a low noise instrumentation amplifier (INA), a low-pass filter (LPF), a variable gain amplifier (VGA), and a successive approximation register (SAR) analog-to-digital converter (ADC). The AFE...
This paper proposes some novel ultralow-power system and circuit designs and trade-offs on the analog front-end integrated circuit (IC) for an implantable cardioverter defibrillators (ICD). The major front-end analog IC components include low-power pre-amplifier, filters, a variable-gain-amplifier (VGA) and an Analog-to-Digital Converter (ADC). We avoided the use of clock signals in the analog IC...
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