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In this paper, a non-preprocess calibration of depth image is proposed Take advantage of FCM to acquire the depth value distribution in the depth image. After that, according to relation among all the centroids of cluster, the real distance is estimated. Then, the error of the depth value is able to be compensated. When utilize the proposed method, plenty of pre-process for calibration can be avoided,...
To improve the aerodynamic performance and efficiency, monitoring the exact geometry and position information of the internal structure with the aero-engine under various operational statuses is a very important and meaningful job task. First, a dynamic digital radiography system is designed for the data acquisition in this paper. However the exposure time of each frame is limited by the rapid rotating...
A precise knowledge of the geometry is always pivotal to a x-ray imaging system, such as computed tomography, digital x-ray tomosynthesis and computed laminography. A typical tomosynthesis system is referred to as the relative positions between the focal spots of the x-ray source and the detector, the object remains in a fixed position above the detector and the x-ray tube emits x-ray beams in the...
Methanol has many advantages, such as safe for storage and transportation and low reforming temperature. Methanol can be use to provide hydrogen for fuel cell. In this research, the multifunction micro-sensors are integrated using the micro-electro-mechanical systems (MEMS) technology for the in-situ monitoring of temperature, flow and pressure within micro reformer. The multifunction micro-sensors...
In this paper, we focus on electronics industry by now, in the manufacturing process, the servo system of the position of the alignment platen to do a study on methods of improving the software, which aims for the measurement system in the circuit board lamination. Characteristic marker can do accurate alignment. In our method, as do the pre-photographic image pre-processing to detect and record the...
This paper presents a self-testing and calibration method for the embedded successive approximation register (SAR) analog-to-digital converter (ADC). We first propose a low cost design-for-test (DfT) technique which tests a SAR ADC by characterizing its digital-to-analog converter (DAC) capacitor array. Utilizing DAC major carrier transition testing, the required analog measurement range is just 4...
There exist a variety of quality assurance techniques for tasks ranging from post-silicon validation, silicon debugging, manufacturing testing, in-field testing, and life time resiliency. Adding dedicated circuitry to exclusively support each task would be too costly, as each technique incurs non-trivial overheads. This paper describes three cost-effective quality assurance techniques that attempt...
This paper presents a production test strategy for digitally-calibrated analog-to-digital converters (ADCs) that incorporate an equalization-based calibration scheme. By analyzing the data obtained in calibration, devices that fail certain static or dynamic specifications can be identified without any additional testing time beyond calibration. The foundation of this test strategy for the ADCs lies...
In this paper, we analyze the relationship between calibration and linearity testing of a digitally-calibrated pipelined ADC. Simulation results validate that the calibration process, once converged, could have automatically covered the INL testing of the ADC under test.
For digitally-calibrated analog, mixed-signal and radio-frequency (AMS/RF) circuits, it is desirable to stop the calibration process as soon as it reaches convergence. Such a strategy can avoid wasting unnecessary calibration time and ensure high calibration quality during production testing. However, due to the lack of systematic methods for convergence detection, existing digitally-calibrated designs...
Modern mixed-signal/RF circuits with digital calibration capabilities could achieve significant performance improvements once the calibration process is completed; however, the calibration time is often very long - in the order of hundreds of milliseconds or even seconds. As testing such devices would require completion of calibration first, lengthy calibration time would result in unacceptably long...
There is a strong demand for both calibrating and testing the ADC performance before and after packaging for mixed-signal SoCs and SiPs. In this paper, we propose a built-in self-calibration scheme that offers digitally-controlled calibration of a pipelined ADC without using external stimulus. We further propose a self-testing strategy that uses the effective number of bits (ENOB) derived directly...
We propose a testing methodology for analog and radio-frequency (RF) circuitry that incorporates digital circuits for performance calibration and adaptation. We explore the reuse of built-in digital calibration circuitry, along with minor digital design-for-testability (DfT) modifications, to test and characterize analog/RF circuit performance. By observing the digital tuning signals captured in the...
A 300 mV 20 MHz-350 MHz low variation all-digital multiphase dual clock output generator with rapid self-calibration has been designed with UMC 90 nm CMOS technology model. The PVT immunity properties of several classic delay elements in low voltage era have been studied. A low voltage calibration unit is also proposed to reduce the maximum multiphase error no larger than 120 ps when delay-locked...
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