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This paper reports a high-performance low-power and area-efficient single-ended SAR ADC for neural signal acquisition. The proposed 10-bit ADC features a novel symmetrical DAC switching technique that resolves the signal-dependent comparator offset voltage problem in conventional single-ended SAR ADCs, and improves the ADC's ENOB. Combined with an existing LSB single-sided switching method, the proposed...
We propose to improve speech recognition performance on speaker-independent, mixed language speech by asymmetric acoustic modeling. Mixed language is either inter-sentential code switching from the source matrix language to a foreign language or intra-sentential code mixing between the matrix language and embedded foreign words or phrases. In either case, the foreign phrases are pronounced by the...
Sneak circuit is studied widely since it is known in the early 1960s. Now it has become an important aspect of system reliability and security. And as more and more new topologies and characteristics are developed in the modern power system, the sneak circuit problem cannot be solved by using the conventional method. Petri net is powerful tool for describing and studying systems and it has been applied...
A novel single-chip 860-960MHz band UHF RFID reader transceiver IC is fabricated in 0.18μm CMOS technology. The transceiver consists of a compact high-linearity low-noise-figure RF front-end, a programmable analog baseband for Rx path; and an image reject filter, a PGA, a switchable up-conversion modulator and a driver amplifier for Tx path. The 3-bit 3rd-order DSM fractional-N frequency synthesizer...
A 433-MHz OOK transmitter with adaptable data rate is presented. The proposed circuit completely turns off the transmitter during the transmission of dasia0psila and employs a speed-up scheme to obtain high data rates and low wake up time. The data rate can be adjusted and adapted to the need of applications. Realized in 0.35-mum CMOS technology, the OOK transmitter has a measured output power of...
A new delay line structure is proposed in this paper. The proposed delay line does not produce cumulative errors as a signal is transmitted along a conventional delay line. The application of the proposed delay line to the circuit design of FIR and IIR filter is described, and the simulation results of an IIR filter are presented.
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