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We consider the scaling of the capacitorless single-transistor [zero-capacitor RAM (Z-RAM)] dynamic RAM (DRAM) cells having surround-gate and double-gate structures. We find that the scaling is limited to the channel length of approximately 25 nm for both types of cells, which is somewhat more pessimistic than previously believed. The mechanisms that are found to be of most importance in imposing...
In this paper, we consider the scaling of capacitor-less single transistor (1T-OC) DRAM by classical (CL) and quantized-ballistic (QB) methods to establish that (1) it may be difficult to scale 1T-OC cell below 30 nm channel length even with ultrathin (<3 nm) body because of the quantum confinement effects, (2) cumulative drain disturb time must be limited to ensure reasonable retention times,...
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