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We report on the promise of dual channel materials using FinFETs for high-performance CMOS for sub 22 nm technology node. We demonstrate pFinFETs with all SiGe channel formed by Germanium condensation onto a Silicon-On-Insulator carrier wafer (SiGeOI) followed by cMOS processing. The devices exhibit 3.6X hole mobility enhancement over Silicon (100) while allowing for VTH control with single high-k...
Omega gate type pFETs with SiGe shell-Si core are demonstrated that show 30% mobility enhancement for (110) oriented fins and 46% mobility enhancement for (100) oriented fins compared to Si omega gate devices. Performance improvement is demonstrated because of higher mobility and inherent epitaxial strain, while the external resistance in the two SiGe and Si omega FETs is comparable. Performance can...
We report the results of a systematic study to understand low drive current of Ge-based nMOSFET. The poor electron transport property is primarily attributed to the intrinsically low density of state and high conductivity effective masses. Results are supported by interface trap density (Dit) and specific contact resistivity (rhoc), which are comparable (or symmetric) for both n- and p-MOSFETs. Effective...
We demonstrate for the first time Schottky barrier height (SBH) tuning using interfacial SiO2/high-kappa dipoles resulting in SBH les 0.1 eV from the conduction band-edge (CBE) and SBH les 0.2 eV from the valence band-edge (VBE). The near band-edge electron and hole SBHs have been obtained using a dielectric-dipole mitigated (DDM) scheme with single metal on Si junction. By optimizing the dielectric...
For the first time strain additivity on III-V using prototypical (100) GaAs n- and p-MOSFETs is studied via wafer bending experiments and piezoresistance coefficients are extracted and compared with those for Si and Ge MOSFETs. Further understanding of these results is obtained by using multi-valley conduction band model for n-MOS and performing k.p simulations for p-MOS. For GaAs n-MOSFET, uniaxial...
The maximum electron and hole mobility enhancement for uniaxial process-induced strained silicon is modeled and experimentally measured using a flexure based 4-point wafer bending jig. The highest known uniaxial stress to date is introduced into the channel of MOSFETs (applied mechanical stress of ~1.0GPa on samples with initial process stress of 1GPa for a total channel stress of ~2Pa). The maximum...
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