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This study investigates the bias temperature instability in high-k/metal-gate pMOSFETs with a TiN barrier layer sandwiched between the metal gate electrode and HfO2 dielectric and for reliability improvement of such devices. The experimental results clearly demonstrated that the diffusion mechanism of oxygen and nitrogen resulting from the post metallization treatment was the root cause of bias temperature...
Stack-transistor structure is often used in RF applications for higher power handling capability and/or isolation. LDMOSFET may provide similar advantages with smaller device area and lower series resistance. The purpose of this work is extracting the RF parameters of a LDMOSFET and design a RF switching circuit with these parameters. The design trade-off between LDMOS and CMOS technologies was discussed...
A new structure of high-voltage junction FET was designed by using a 40 V LDMOS technology without additional mask in this process. This JFET also has the same breakdown capability as the LDMOSFET. The pinch-off voltage of the JFET was determined by layout, the n-well opening. The pinch-off voltage was almost unchanged with temperature variation. This JFET can be used in circuit applications with...
In this paper the phenomenon of Double Hump Substrate Current (DHSC) in NLDMOSFET is studied. We used 2-D device simulator MEDICI to investigate the physical mechanism. It is shown that the double hump substrate current is strongly dependent on the lateral electric field at the source-side. The fall-off in the substrate current at high VGS is caused by hole velocity reduction due to the larger vertical...
The effect of partially undoped poly-silicon gate above the drift region in P-lateral double-diffused MOS (P-LDMOS) Transistors is investigated. Experiment results show that it can improve the off-state leakage current and reduce the on-state resistance. For hot carrier performance, this structure induces a higher initial current shift due to less vertical field. The long-term hot carrier degradation...
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