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An FPGA implementation of a hybrid algorithm developed for target motion estimation in a wideband sonar echolocation system is presented in this paper. The compact and fast hardware architecture consists of three parts: discrete wavelet transform (DWT) filtering bank, scale optimizer and continuous wavelet transform (CWT) convolver. The algorithm initially makes use of an intelligent fuzzy system...
A compact and fast hardware architecture using a digital approximation and current VLSI technology as a field- programmable gate array (FPGA) structure has been developed for applications in broadband sonar signal detection. The VLSI implementation is sought to maximize the speed of a hybrid algorithm developed previously for the underwater active sonar echolocation system. It consists of two parts:...
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