The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
With the substrate suffering from the contamination of nitrogen, the variation of after-developing-inspection (ADI) linewidth with time could be monitored by CDSEM. This phenomenon has been attributed to the footing produced by acid loss. Moreover, the oxidation of nitrogen-containing substrates can cause the variation of capability of trapping acid, so the profile of photoresist (PR) changes with...
A segmented and unsegmented 3D insulated copper through silicon vias (TSVs) of diameter 10μm, height 100μm and silicon of sizes 100μm by 100μm by 100μm are modelled using analysis system (ANSYS) and equivalent circuit using advanced design system (ADS) at frequency ranges between 100MHz and 20GHz at 10MHz step sizes. The segmented via is divided into three parts; part 1, part 2 and part 3. Each part...
A 4H-SiC MOSFET with breakdown voltage higher than 1200V has been successfully designed and fabricated. Numerical simulations have been performed to optimize the parameters of DMOSFET. The n-type epilayer is 10 μm thick with a doping of 6×1015 cm−3. The devices were fabricated with a floating guard ring edge termination. The drain current Id = 10 A at Vg = 20 V, corresponding to Vd = 2.0 V.
Through Silicon Via Interconnects are usually protected with liners. A research on liners was done and conclusion made that they experience reliability problems like hoop stress which put them and the Through Silicon Via in danger. Simulation using Analysis Software was done on Silicon Dioxide liner. A Through Silicon Via of internal radius five micrometers, silicon liner of thickness two micrometers...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.