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This paper presents the architecture and hardware of the developed real time road signs recognition system. Image processing and recognition methods ensuring efficiency of real time road signs recognition system, are offered.
Systematised classes arithmetic and logical operations and functional operations in different theoretical and numerical basis. Investigated the system characteristics of one-bit half-adder. The proposed the circuit engineering solution of synthesis of half-adder with functional completeness of inputs and outputs and maximum speed 1 mikrotakt based on logic elements AND-NOT, which simplifies their...
Basic types of parallel and sequential half- and full adders, including unitary carry-save, modulo 2 and modulo P adders are categorized. The system characteristics of structural, hardware and time complexity is researched of one-bit adder, which is used to perform various modular arithmetic operations in multi-bit special processors for data encryption.
In this paper the Theoretical basis of components and accelerator multi-digit processors and the structure of the synthesized arithmetic logic units operating multibasis processors, it targeted at solving problems encryption.
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