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A Mobile Ad Hoc Network (MANET) is a group of wireless mobile nodes which dynamically form a network without any established infrastructure. The application is considered in an agro-based project and therefore, Routing protocols are mandatory to send and receive packets. In this paper, we have evaluated the most commonly used routing protocols in MANET and compared the performance of reactive routing...
Hybridization between CMOS logic and single electron transistor has already revolutionized our present nano technological aspects. Ultra low power consumption as well as ultra dense circuit formation is now possible with the help of mutual integration between the two mentioned above. These benefits have drawn the attraction of the future researchers in this hybrid SET-CMOS technology for future nano-scale...
The co fabrication of S ET & CMOS technology has already proved its ability to bring a drastic change in the era of nanodimensional devices. In our present work a well known combinational circuit, octal to binary encoder is demonstrated using hybrid SET-CMOS technology in 22 nanometer node. We have presented power analysis for the circuit here. Power delay product for the circuit has also been...
The Co-integration of SET (Single Electron Transistor) and CMOS is the new evolution for the stunning growth in modern semiconductor industry. In the present work we have demonstrated that the successful implementation of ALU (Arithmetic Logic Unit) using hybrid SET-CMOS and hybrid SET-CMOS based Reversible logic gates. We have represented the simulation output of the both cases and a comparison has...
High speed, small-size and low-power consuming devices and systems is the considerable solution for next generation technological solution. The search for new principle of operation of the small-size, high speed and low-power device is becoming more and more important. Hear we studied two dimensional SOI and SON Inverter in nano scale, as well as Power dissipation and Delay is being calculated. We...
In present research areas of VLSI design & Microelectronics technology, Single Electron Transistor is in a place of attraction for the researchers due to, ultralow power dissipation, feature size in nanoscale and characteristics like Coulomb blockade, it may replace Field Effect Transistor (FET). SET is very much advantageous than CMOS in few points. And from some different points CMOS is much...
In this work, we have used the novel concept of linearly graded binary alloy, as gate material in the popular structure of underlap symmetric Double Gate (DG) MOSFET and developed an analytical model to study the potential distribution in the gate overlap and underlap of our proposed structure. Based on this potential model, an overall performance comparison of the underlap DG MOS with and without...
Single electron devices have extremely poor driving capabilities so that direct application to practical circuits is as yet almost impossible. A new methodology to overcome this problem is to build hybrid circuits consisting of single electron transistors (SETs) and CMOS interfaces. In this work a room temperature operable hybrid CMOS–SET inverter circuit, hybrid CMOS–SET NOR gate and their Voltage...
Hybrid SET-CMOS circuits which combine the merits of both the SET and CMOS promises to be a practical implementation for future low power ultra-dense VLSI/ULSI circuit design. In this work, an SET-CMOS hybrid pulse divider circuit is proposed. The MIB model for SET and BSIM4 model for CMOS are used. The operation of the proposed circuit is verified in Tanner environment. The performances of CMOS and...
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