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Advances in technology has allowed us to demand for high speed and low power devices in modern chips. These transistors are scaled down and examined with multi-gate architecture in order to improve electrostatic control over the channel and reduce power consumption. A novel dual-gate gate-all-around (GAA) junctionless nanowire transistor (JNT) is addressed in this work. Using TCAD device modeling,...
Advances in short channel transistor technology has allowed the emergence of these devices in modern chips. These transistors experience many different types of Short Channel Effects (SCE) that are addressed in this work. Using TCAD simulations, we report a new and effective technique to reduce SCE in a novel dual-gate silicon nanowire Gate-All-Around (GAA) junctionless transistor. A channel length...
The measurement of power factor (PF) in electrical utility grids is a mainstay of load balancing and is also a critical element of transmission and distribution efficiency. The measurement of PF dates back to the earliest periods of electrical power distribution to public grids. In the wide-area distribution grid, measurement of current waveforms is trivial and may be accomplished at any point in...
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