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This paper proposed a power validation utility for Virtex2Pro FPGA. This tool is developed for power validation purpose for the various digital circuits designs targeted to FPGAs. In today's scenario high power consumption is the main issue in digital systems and lots of researchers are working in this domain. Although, there are some sophisticated tools available for power analysis like Xpower estimator,...
The central idea of this work is to design a vending machine that will be able to provide a number of items like soft drink, cake & coldrinks to people. The machine will also deliver the change, depending on the amount of money inserted and the price of product. At the same time we have made efforts to make the design of the Vending Machine power efficient by using power reduction techniques....
Now-a-days every electronics system, ranging from small mobile phone to satellite has SOC (System-on-chip). Over the years, SOC has undergone rapid evolution and are still processing at a swift pace. But due to this explosive evolution of semiconductor industry, the devices are scaling down at a rapid rate and hence, SOC today have become communication-centric. However the existing bus architectures...
A Switching system is used to communicate from calling subscriber to called subscriber. The communication can takes place either in wired mode or wireless mode known as landline and mobile switching. In this paper we are going to implement the programmable electronics switching system with the help of VHDL using behaviour style of modelling. In this paper, we have designed three different architectures...
In this work, a new technique known as bypass technique has been introduced mainly to reduce the switching power dissipation. In array multipliers, this technique offers huge dynamic power saving but due to their regular interconnection scheme, it misses the reduced area and high speed advantages of tree multipliers. Hence we have introduced a mixed architecture style which contains a tree multiplier...
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