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Logic obfuscation is widely followed in intellectual property cores and chip designs as hardware protection mechanism against design security threats such as reverse engineering (RE), piracy, cloning, overbuilding, etc. In general, sequential obfuscation has two modes of operation such as obfuscated and functional modes. Finite state machines (FSM) are being used to implement the mode control. When...
The delay time in electromagnet clutch release during a reactor trip (scram action) is an important safety parameter, having a bearing on the plant safety during various design basis events. Generally, it is measured using current decay characteristics of electromagnet coil and its energising circuit. A simplified method of measuring the same in a Sodium cooled fast reactors (SFR) is proposed in this...
In applications such as nuclear power plant, space and military, safety critical systems play an important role, where security is one of the crucial design parameters. Similar to software Trojans (virus), Hardware Trojans (HT) are raising security concerns in recent years. HTs are malicious additions or modifications to existing circuit elements which are implemented either as always on or triggered...
High dependability on Instrumentation and control (I & C) systems calls utmost importance for smooth functioning as well as the safety of Nuclear power plants. I&C systems are employed for monitoring of the parameters, control of these parameters and protection of the plant and persons. The Embedded systems play major role in design and development of I&C systems. While designing I&C...
This paper details the Process Disturbance Analyzer (PDA) for 500 MWe Prototype Fast Breeder Reactor (PFBR). The various parameters that assist safe operation of the reactor are to be monitored continuously to aid post event/disturbance analysis of the plant. Some critical analog and digital signals from circuit breakers, power supply, variable speed drive etc., are fast in nature and are to be scanned...
500MWe sodium cooled Prototype Fast Breeder Reactor (PFBR) is in the advanced stage of construction at Kalpakkam (Tamilnadu), INDIA. PFBR is provided with two independent and fast acting shutdown systems (SDS). Each SDS consists of sensors, signal processing electronics, safety logic (SL) system, drive mechanisms and neutron absorber rods (NARs). The purpose of SDS is to reduce the reactor power rapidly...
Versa Module Eurocard (VME) backplane bus based architecture has been standardized for Real Time Computer (RTC) based I&C systems of Indian fast reactors. A typical RTC consists of a CPU card and a set of I/O cards. VMEbus based CPU card is currently being used in the computer based I&C systems of FBTR at IGCAR. The CPU card uses a commercial VMEbus Interface controller (VIC), which is now...
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