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A 25MHz low-power sign and magnitude (SAM) converter for processing bi-directional currents is proposed. It converts the lowest current of ±1μA in less than 40ns, and does not require any static bias currents. The circuit is designed using a 0.35μm CMOS process, and functionalities are confirmed by simulation results.
A high-frequency low-power switched-current (SI) sample-and-hold (S/H) of a current-mode analog iterative decoder is proposed. A capacitor divider is used to reduce charge injection from the sampling switch and a cascode transistor is used to reduce channel length modulation. The cascode transistor is biased by a CMOS peaking current source rather than the conventional CMOS Widlar current source to...
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