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A complete ultra-wideband (UWB) radar system is presented in this paper. The radar system consists of UWB CMOS radar transceiver and two compact directional UWB antennas for the purpose of transmission and reception. Different possible applications were investigated in the domain of ranging and tracking using this system along with fast and efficient signal processing algorithms. The results obtained...
This paper presents the advanced I/O device design for 32 nm Hi-K Metal Gate technology with multi-high operation voltages. Process optimization work is done on the I/O composite gate dielectric stack to improve TDDB Vmax. By using advanced junction engineering, 3.3 V device Isubmax is reduce by 30-40% without Ion degradation based on TCAD simulation guideline. At the same time, 2.5 V device drive...
This paper proposes a low power MICS band receiver channel selection filter on 65 nm CMOS for implantable biomedical devices. This 5th-order elliptic OTA-C bandpass filter utilizes sub-threshold inverter based OTAs. In order to broaden input range of the filter, the first OTA stage is linearized by using the active-error feedforward technique. The overall filter only consumes 300 μA DC current under...
This is a brief review of recent work on the prospective hybrid CMOS/memristor circuits. Such hybrids combine the flexibility, reliability and high functionality of the CMOS subsystem with very high density of nanoscale thin film resistance switching devices operating on different physical principles. Simulation and initial experimental results demonstrate that performance of CMOS/memristor circuits...
This paper presents a super low power MICS band receiver front-end down converter on 65 nm CMOS for implantable biomedical devices. This down converter, including a LNA and a quadrature mixer, only consumes 500 µA DC current under 1 V supply. With a small LO swing of 300 mV, it provides a voltage conversion gain of 35 dB and a noise figure of 7.4 dB, while a −20 dBm IIP3 is obtained. In order to achieve...
This paper presents a fully flexible stimulator using 65 nm CMOS process for a 1024-electrode epi-retinal prosthesis. The stimulator can select any number of electrodes at any time and also supports both mono-polar and multi-polar stimulation. Furthermore, the stimulator supports a wide range of stimulus parameters. A novel feature is that the electrode driver operates in an alternately pull-push...
This work describes the first multiband WCDMA/HSPA/EGPRS single-chip transceiver with GPS and receiver diversity. This device supports UMTS bands 1,2,3,4,5,6,8,9,10 and GSM/EDGE 800, 900, 1800, 1900 MHz bands. It is implemented in cost-effective 0.18 mum RF CMOS technology and uses a reduced number of TX and RX SAW filters.
Monolithic optoelectronic integrated circuits on CMOS chips are envisioned for realizing future high speed systems. Some of the key technologies that are required include electrically injected, low threshold and highly reliable lasers and the monolithic integration of lasers, waveguides and modulators on Si with Si-based electronic devices in a CMOS-compatible process.
The gate-and-drain fully-overlap LATID (Large-Tilt-Angle Implanted Drain) structure has been proposed recently and been used in submicron MOS device design to suppress the spacer-induced degradation and improve the device current drivability. So far, none has been provided to study quantitatively the hot carrier effect for various device process conditions such as the implantation of n/sup -/ dosage...
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