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A variety of issues such as increasing interconnect resistivity, low bandwidth and serious cross talks have limited the usage of copper interconnect in the deep submicrometer node. On-chip optical waveguide emerges as a promising replacement material for copper interconnect. The deployment of on-chip optical integration in modern VLSI design certainly needs the advanced CAD tools. This work proposes...
In Standard cell library based design methodology, maintaining multiple driving strengths for each gate type is critical for timing closure and low power. However, due to formidable burden on library designers, often only a few gate implementations are available for many gate types. The problem becomes more difficult if constructing accurate delay tables is considered. This imposes a great challenge...
As VLSI technology reaches 45rara technology node, leakage power optimization has become a major design challenge. Threshold voltage (vt) assignment has been extensively studied, due to its effectiveness in leakage power reduction. In contrast to the efficiently solvable continuous vt assignment problem, the discrete vt assignment problem is known to be NP-hard. All of the existing techniques are...
As a prevalent constraint, sharp slew rate is often required in circuit design, which causes a huge demand for buffering resources. This problem requires ultrafast buffering techniques to handle large volume of nets while also minimizing buffering cost. This problem is intensively studied in this paper. First, a highly efficient algorithm based on dynamic programming is proposed to optimally solve...
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