The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
The Hot Carrier (HC) reliability of NMOS transistors fabricated on biaxially tensile-strain SOI substrates (sSOI) is compared to that of devices fabricated on standard unstrained SOI substrates. It is shown that sSOI-based devices not only exhibit a 10% higher performance in term of ION/IOFF but also show superior HC reliability at same drive current. This reliability improvement may be explained...
The Hot Carrier (HC) reliability of NMOS transistors fabricated on biaxially tensile-strain SOI substrates (sSOI) is compared to that of devices fabricated on standard unstrained SOI substrates. It is shown that sSOI-based devices not only exhibit a 10% higher performance in term of ION/IOFF but also show superior HC reliability at same drive current. This reliability improvement may be explained...
We report an experimental study of the defects induced by the TiN metal gate. N-induced defects are evidenced and energy profile through the Si band gap is measured by original spectroscopic charge pumping measurements. The density of defects is then correlated to the electron mobility degradation and compared to a theoretical model.
A novel method is proposed to extract interface state density Dit at both front and back gate interfaces. This accurate technique based on CV and GV measurements, enables to measure low Dit densities ~1010 traps/cm2/eV, at both interfaces on standard FDSOI transistors. In particular, it was found that DitBG is very low ~3.1010 traps/cm2/eV, and about one decade smaller than DitFG = 5.1011 traps/cm...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.