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A 0.4mm2 low-power fully-reconfigurable continuous-time (CT) feedforward ΔΣ ADC for 4G radios is implemented in 90nm CMOS. By reconfiguring the topology architecture, quantizer bits, biasing current and component parameters, optimal power consumption can be achieved for every mode. The modulator achieves a DR of 85/78/76/72/58dB for GSM/BT/UMTS/DVB-H/WLAN with 2.8/2.6/3.6/4.9/8.5mW from 1V supply...
This paper presents a novel design approach for fully reconfigurable low-voltage delta-sigma analog-digital converters for next-generation wireless applications. This approach guides us to find the power-optimal solution corresponding to the specifications of various wireless standards by exploring single-loop feedback and feedforward topologies with different filter order, number of quantizer bits,...
Continuous-time Delta-Sigma (DS) modulators are good candidates for applications in wideband and high-frequency data communication systems because of their high power efficiency. 4G system is a combination of different standards with different specifications, which requires that ADCs in such a system be reconfigured to minimize the power consumption for different specification. This paper tries to...
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